<img height="1" width="1" style="display:none" src="https://www.facebook.com/tr?id=145304570664993&amp;ev=PageView&amp;noscript=1">

Aug 25, 2021 \ Machine Learning, AI, IPU

Designing the Colossus Mk2 IPU: Simon Knowles at Hot Chips 2021

Written By:

Sally Doherty

Addressing the Hot Chips 2021 conference, Graphcore co-founder and CTO Simon Knowles delivers a detailed technical keynote on the design and capabilities of the ColossusTM GC200 Intelligence Processing Unit (IPU). 

Simon outlines the need for a specialist AI processor as a means of unlocking new directions in AI research. He also discusses the importance of sparse computation as a means of handling the multi-trillion parameter models that will be required for human-level machine intelligence.  

Design features of the IPU, covered in Simon’s talk, include: 

  • The GC200’s 1,472 parallel processing cores and 900MiBytes of on-die memory 
  • Graphcore’s approach to achieving ultra-high bandwidth at both chip and system level
  • Economic and performance comparison of DRAM exchange memory vs off-chip HMB 
  • Use of Bulk Synchronous Parallel for scheduling compute and communication cycles 
  • Tile design and redundancy 
  • Power usage 
  • Lessons from the Mk1 Colossus IPU 

Learn more 

WEBINAR: Enabling machine learning innovation with IPU technology 

Hot Chips 2021  

×