Designed for AI

INTELLIG‌ENC‌‌E P‌R‌‍OC‍‌ESSING‍‌‍ U‌‍NIT

The world's most complex processor, co-designed with Poplar software, so it's easy to deploy

Introducing the Colossus™ MK2 GC200 IPU

Introducing our second-generation Colossus™ MK2 IPU processor – the GC200. The IPU is a completely new kind of massively parallel processor, co-designed from the ground up with the Poplar® SDK, to accelerate machine intelligence. Since our first generation Colossus IPU, we have developed groundbreaking advances in compute, communication and memory in our silicon and systems architecture, achieving an 8x step up in real-world performance compared to the MK1 IPU. The GC200 is the world's most complex processor made easy to use thanks to Poplar software, so innovators can make AI breakthroughs.

Next Generation Compute

With 59.4Bn transistors, and built using the very latest TSMC 7nm process, the Colossus MK2 GC200 IPU is the world's most sophisticated processor. Each MK2 IPU has 1472 powerful processor cores, running nearly 9,000 independent parallel program threads. Each IPU holds an unprecedented 900MB In-Processor-Memory™ with 250 teraFLOPS of AI compute at FP16.16 and FP16.SR (stochastic rounding). The GC200 supports much more FP32 compute than any other processor.

Powering The New IPU-Machine

The IPU-M2000 is Graphcore's new breakthrough IPU system built with our second generation IPU processors for the most demanding machine intelligence workloads. Our advanced architecture delivers 1 petaFLOP of AI compute with 3.6GB In-Processor-Memory™ and up to 256GB Streaming Memory™. The IPU-Machine features our new ultra-low latency IPU-Fabric™ to build scale-out IPU-POD™ data centre solutions connecting up to 64,000 IPUs.

Colossus™ MK1 - GC2 IPU

The Colossus™ MK1 IPU, the world's first Intelligence Processing Unit, is a powerful, easy-to-use AI processor. With a completely different architecture to today's CPUs and GPUs, the IPU was designed from the ground up to deliver state of the art performance on current machine learning models for both training and inference.

Citadel White Paper

In this detailed Technical Paper, Citadel analyse and evaluate Graphcore MK1 IPU Architecture via Microbenchmarking. Dissecting the IPU’s memory organisation and performance, the study takes a detailed look at latency and bandwidth that the on-chip and off-chip interconnects offer. The paper also evaluates the IPU’s compute power over matrix multiplication, convolution, and AI/ML primitives.